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  programmable back biased hall-effect switch with tpos functionality package diagram pin 1 = vcc pin2=vout pin3=noconnect pin 4 = gnd the ATS635LSE and ats636lse programmable, true power-o n state (tpos), sensors are an optimized hall-effect ic and magnet combination that switch in response to magnetic signals created by ferrous targets in gear- tooth sensing and proximity applications. the devices are externally programmable. a wide range of programmability is available on the magnetic operate point (b op ) while the hysteresis remains fixed. this advanced feature allows for optimization of the sensor switch point and can drastically reduce the effects of mechanical placement tolerances found in production environments . a proprietary dynamic offset cancellation technique, with an internal high-frequ ency clock, reduces the residual offset voltage, which is normally caused by device overmolding, temperature dependencies, and thermal stress. having the hall element and amplifi er in a single chip minimizes many problems normally associated with low-level analog signals. this sensor system is ideal for use in gathering speed or position information using gear- tooth- based configurations, or for proximity sensing with ferrous targets. the ATS635LSE switches high in the presence of a ferrous target or tooth and switches low in the presence of a target valley, window, or when the ferrous target is removed. the ats636lse has the opposite polarity and switches low in the presence of a ferrous tar get or tooth and switches high in the presence of a target valley, window, or when the ferrous target is removed. absolute maximum ratings supply voltage, v cc ... 28 v* reverse supply voltage, v rcc -18 v overvoltage supply current, i cc .. 100 ma output off voltage, v out 26.5v output sink current, i out .... 20 ma ? magnetic flux density, b unlimited package power dissipation, p d .. see graph operating tem perature range, t a suffix l..... -40cto+150c junction temperature, t j .... 165 c storage temperature range t s -65cto+170c *fault conditions that produce supply voltage transients will be clamped by an internal zener diode. these conditions can be tolerated but should be avoided. ? internal current limiting is intended to protect the device from output short circuits, but is not intended for continuous operation. features chopper stabilization extremely low switch-point d rift over temperature on-chip protection supply transient protection output short-cir cuit protection reverse-battery protection true zero-speed operation true power-on state single-chip sensing ic for high reliability optimized magnetic circuit wide operating voltage range internal regulator these devices are available in lead (pb) free versions, with 100% matte tin leadframe plating. ATS635LSE and ats636lse ATS635LSE-ds worcester, massachusetts 01615-0036 (508) 853-5000 115 northeast cutoff, box 15036 www.allegromicro.com allegro microsystems, inc. use the following complete part numbers when ordering: part number pb-free output (tooth) packing* ATS635LSEtn-t yes high 13-in. reel, 450 pieces/reel ats636lsetn-t yes low 13-in. reel, 450 pieces/reel *contact allegro for additional packing options.
ATS635LSE and ats636lse programmable true po wer - on hall - effect g ear - tooth switche s page 2 of 15 115 northeast cutoff, box 15036 worcester, massachusetts 01615 - 0036 (508) 853 - 5000 copyright ? 2005 allegro microsystems, inc. characteristics electrical characteristics over operating voltage and junction temperature range (unless otherwise noted) limits characteristics symbol test conditions min. typ. max. units suppl y voltage 1 v cc operating 4.2 ? 24 v after programming v cc = 0 v cc(min) , t > t on : b < b op ats636 high high high ? power - up state pos b < b op ats635 low low low ? low output voltage v out(sat) output on, i out = 20 ma ? 175 400 mv output current limit 2 i outm pulse test method output on 30 50 90 ma output leakage current i off output off, v out = 24 v ? ? 10 a output off (high) ? 2.5 5.5 ma supply current i cc output on (low) ? 2.5 5.5 ma reverse supply current i rcc v rcc = - 18v ? ? - 5 ma power - on delay 3 t on output off; v cc > v cc(min) ? 35 50 s output rise time t r r l = 820 w , c l = 10 pf ? 1.2 5 s outp ut fall time t f r l = 820 w , c l = 10 pf ? 1.2 5 s sampling frequency f sample - ? 250 - khz supply zener voltage v zsupply i cc = i cc ( max ) + 3 ma t a = 25c 28 ? ? v output zener voltage v zoutput i out = 3 ma t a = 25c 30 ? ? v supply zener current 4 i zsup ply v s = 28 v ? ? 8.5 ma output zener current i zoutput v o = 30 v ? ? 3 ma note: typical data is at v cc = 12 v and t a = +25c. 1 do not exceed the maximum thermal junction te mperature: see power de - rating curve. 2 short circuit protection is not intended for continuous operation and is tested using pulses. 3 the power on delay is the time that is necessary before the output signal is valid 4 the maximum spec limit for this par ameter is equivalent to i cc ( max ) + 3 ma
ATS635LSE and ats636lse programmable true po wer - on hall - effect g ear - tooth switche s 115 northeast cutoff, box 15036 worcester, massachusetts 01615 - 0036 (508) 853 - 5000 copyright ? 2005 allegro microsystems, inc. magnetic characteristics over operating voltage and junction temperature range using reference target (unless oth erwise noted) limits characteristics symbol test conditions min. typ. max. units switch point ? 7 ? bit switch point polarity ? 1 ? bit number of programming bits - programming lock ? 1 ? bit gear tooth sensor / proximity sensing characteristi cs (low switchpoint only) temp: 25c code ? 127 2.5 ? ? mm 1 programming air gap range ag range temp: 25c code +127 ? ? 1.5 mm programming resolution ag res temperature: 25c program air gap = 2.5 mm ? 0.05 ? mm 2 air gap drift over full temperatur e range ag drift device programmed to 2.5 mm ? 0.2 ? mm over tooth (ATS635LSE) ? high ? ? over valley (ATS635LSE) ? low ? ? over tooth (ats636lse) ? low ? ? polarity p over valley (ats636lse) ? high ? ? 1 the switch point will vary over temperature. a sufficient margin obtained through customer testing is required to guarantee functionality over temperature. programming at larger air gaps leaves no safety margin for switchpoint drift. see the applications note: ?proximity sensing programming technique? http://www.allegromicro.com/techpub2/proximity_sensing/ or visit the allegro website at http://www.allegromicro.com for additional information. 2 the switch point will vary over temperature, proportionally to the programmed air gap. this parameter is based on characterization data and is not a test ed parameter in production. switch point air gap generally drifts downward as temperature increases. tooth and valley field vs. air gap reference target 0 200 400 600 800 1000 1200 1400 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 air gap [mm] flux density [gauss] reference target tooth reference target valley reference target tooth and valley field vs. air gap reference target flux density vs. position 0 200 400 600 800 1000 1200 1400 0 30 60 90 120 150 180 210 240 270 300 330 360 position (o) flux density (gauss) 0.25 0.50 0.75 1.00 1.25 1.50 1.75 2.00 2.25 2.50 2.75 3.00 3.25 3.50 3.75 4.00 4.25 4.50 4.75 5.00 5.25 5.50 5.75 6.00 reference target flux density vs. position: typ ical
ATS635LSE and ats636lse programmable true po wer - on hall - effect g ear - tooth switche s 115 northeast cutoff, box 15036 worcester, massachusetts 01615 - 0036 (508) 853 - 5000 copyright ? 2005 allegro microsystems, inc. reference target dimens ions target outside diameter (d o ) face width (f) circular tooth length (t) circular valley length (p c ? t) tooth whole depth (h t ) reference target 120mm 6mm 23.5mm 23.5mm 5mm gear parameters for correct operation limits characteristic descripti on min. typ. max. units tooth whole depth (h t ) depth of target valley 5 ? ? mm circular valley length (p c ? t) length of target valley 13 ? ? mm circular tooth length (t) length of target tooth 5 ? ? mm face width (f) thickness or width of ta rget tooth 5 ? ? mm material : crs 1018 reference target reference target
ATS635LSE and ats636lse programmable true po w e r - on hall- effect ge a r - t ooth switche s 115 northeast cutoff, box 15036 worcester, massachusetts 01615 - 0036 (508) 853 - 5000 copyright ? 2005 allegro microsystems, inc. electromagnetc capability (emc) performance please contact allegro microsystems for emc performance test name reference specification e s d ? human body model aec- q100- 0 0 2 esd ? machine model aec- q100- 0 0 3 conducte d transients iso 7637- 1 direct rf injection iso 11452- 7 bulk current injection iso 11452- 4 tem cell iso 11452- 3 functional block diagram reg clock/logic amp s/h lpf current limit vcc out gnd programmming logic program / lock offset adjust to all subcircuits
ATS635LSE and ats636lse programmable true po wer - on hall - effect g ear - tooth switche s 115 northeast cutoff, box 15036 worcester, massachusetts 01615 - 0036 (508) 853 - 5000 copyright ? 2005 allegro microsystems, inc. regulator amplifier sample/ hold clock hall element functional description chopper - stabilized technique . the basic hall sensor is a small sheet of semiconductor material in which a constant bias current will flow when a constant voltage source is applied. the output will take the form of a voltage measured across the width of the sheet and will have negligible value in the absence of a magnetic field. when a ma gnetic field with flux lines at right angles to the hall current is applied, a small signal voltage directly proportional to the strength of the magnetic field will occur at the output terminals. this signal voltage is proportionally small relative to t he offset produced at the input of the chip. this makes it very difficult to process the signal and maintain an accurate, reliable output over the specified temperature and voltage range. therefore, it is important to reduce any offset on the signal that could be amplified when the signal is processed. chopper stabilization is a unique approach used to minimize input offset on the chip. this technique removes a key source of output drift with temperature and stress, and produces a 3x reduction in offset over other conventional methods. this offset reduction chopping technique is based on a signal modulation - demodulation process. the undesired offset signal is separated from the magnetically induced signal in the frequency domain. the offset (and any l ow frequency noise) component of the signal can be seen as signal corruption added after the signal modulation process has taken place. therefore, the dc offset is not modulated and remains a low frequency component. consequently, the signal demodulation process acts as a modulation process for the offset causing the magnetically induced signal to recover its original spectrum at baseband while the dc offset becomes a high frequency signal. then, using a low pass filter the signal passes while the modula ted dc offset is suppressed. the advantage of this approach is significant offset reduction, which de - sensitizes the chip against the effects of temperature and stress. the disadvantage is that this technique features a demodulator that uses a sample and hold block to store and recover the signal. this sampling process can slightly degrade the signal - to - noise ratio (snr) by producing replicas of the noise spectrum at the baseband. the degradation is a function of the ratio between the white noise spectr um and the sampling frequency. the effect of the degradation of the snr is higher jitter, a.k.a. signal repeatability. in comparison to a continuous time device, the jitter spec can be increased by a factor of five. figure 1 ? concept of chopper -stabilization algorithm
ATS635LSE and ats636lse programmable true po wer - on hall - effect g ear - tooth switche s page 7 of 15 115 northeast cutoff, box 15036 worcester, massachusetts 01615 - 0036 (508) 853 - 5000 copyright ? 2005 allegro microsystems, inc. function description: addressing / programming protocol the ATS635LSE and ats636lse magnetic operate point (b op ) is programmed by serially addressing the devices through the supply terminal (1). after the correct operate point is determined, the device programming bits are selected and blown, then a lock bit is selected and blown to prevent any further (accidental) programming. addressing: bop is programmable in both the positive and negative direc tion from its initial value. addressing is used to determine the desired code, while programming is used to lock the code. a unique key is needed to blow fuses, while addressing as described below does not allow for the device to be programmed accidental ly. addressing with positive polarity. the magnetic operate point (b op ) is adjustable using 7 bits or 128 addresses. the addresses are sequentially selected (figure 2) until the required operate point is reached. the first address must be selected wit h a high voltage pulse (v pp ), while the remaining pulses should be v ph pulses. note that the difference between b op and the magnetic release point (b rp ), the hysteresis (b hys ), is fixed for all addresses. 0 v pl v ph t d(1) t d(0) code 1 code 2 code 3 code n-2 code n-1 code n (up to 127) v pp figure 2 ? address ing pulses: positive polarity addressing with negative polarity. the magnetic operate point (b op ) is adjustable with negative polarity using 7 bits or 128 addresses. to invert the polarity it is necessary to first apply a keying sequence (figure 3). th e polarity key contains a v pp pulse and at least 1 v ph pulse, but no more than 6 v ph pulses; the key in figure 3 shows 2 v ph pulses. the addresses are then sequentially selected until the required operate point is reached. the first address must be selec ted with a high voltage pulse (v pp ), while the remaining pulses should be v ph pulses. 0 v pp v pl v ph t d(1) t d(0) code -1 code -2 code -3 code -(n-2) code -(n-1) code -n (up to -127) polarity key figure 3 ? addressing pulses: negative polarity
ATS635LSE and ats636lse programmable true po wer - on hall - effect g ear - tooth switche s page 8 of 15 115 northeast cutoff, box 15036 worcester, massachusetts 01615 - 0036 (508) 853 - 5000 copyright ? 2005 allegro microsystems, inc. program enable. to program the device, a keying sequence is used to activate / enable the programming mode as shown in figure 4. this program key sequence consisting of a v pp pulse, at least seven v ph pulses, and a v pp pulse with no supply interruptions. the sequence is designed to prevent the device from being programmed accidentally (e.g., as a result of noise on the supply line). 0 t d(1) t d(1) t d(0) program enable 7 or more pulses (8 pulses shown) v pl v ph v pp figure 4 ? program enable pulse sequence code programming. after the desired switch point code is selected (0 through 127), each bit of the corresponding binary address should be pro grammed individually, not at the same time. for example, to program code 5 (binary 000101), bits 1 and 3 need to be programmed. a bit is programmed by addressing the code and then applying a v pp pulse, the programming is not reversible. an appropriate s equence for blowing code 5 is shown in figure 5. figure 5 ? code programming example polarity bit programming. if the desired switchpoint has negative polarity, the polarity bit must be programmed. to do this it is necessary to first app ly the polarity key sequence before the program key sequence (figure 6). finally a v pp pulse of duration t dp must be applied to program this bit, the programming is not reversible. the polarity bit is for adjusting programming range only and will not affe ct the output polarity. the proper output polarity device is determined by ordering the correct part number (ats635 or ats636), as they are different ics. v ph v pp program enable 0 v pl t d(1) t d(1) t d(0) t dp polarity key polarity bit program figure 6 ? polarity bit programming v ph v pp program enable bit 1 address bit 1 program bit 3 address 000100 code 4 bit 3 program program enable 0 v pl t d(1) t d(1) t d(0) t dp 000001 code 1
ATS635LSE and ats636lse programmable true po wer - on hall - effect g ear - tooth switche s page 9 of 15 115 northeast cutoff, box 15036 worcester, massachusetts 01615 - 0036 (508) 853 - 5000 copyright ? 2005 allegro microsystems, inc. lock - bit programming. after the desired code is programmed, the lock bit (code 128), can be programmed (figure 7) to prevent further programming of the device. again; programming is not reversible. figure 7 ? lock - bit programming pulse sequence see allegro website at http://www.allegromicro.com for extensive information on device programming as well as programming products. programming hardware is available for purchase and programming software is available for free. valid over ope rating temperature range unless otherwise noted . limits part number characteristics symbol test conditions min. typ. max. units programming protocol (t a = +25c) v pl minimum voltage range during programming 4.5 5 5.5 v v ph 8.5 ? 15 v 5 , 6 programming voltage v pp 25 ? 27 v programming current i pp maximum supply current during programming ? 500 ? ma t d(0) off time between bits 20 ? ? s t d(1) enable, address, program, or lock bit on time 20 ? ? s pulsewidth t dp program pulse on time 100 300 ? s pulse rise time t r v pl to v ph or v pp ? ? 11 s ats635 / ats636 pulse fall time t f v ph or v pp to v pl ? ? 5 s 5 programming voltages are measured at pin 1 (v cc ) of sip. a minimum capacitance of 0.1 f must be connected from v cc to gnd of the sip to provide the cu rrent necessary to blow the fuse. 6 testing is the only method that guarantees successful programming. v ph v pp program enable 0 v pl t d(1) t d(1) t d(0) t dp lock bit address 128 pulses lock bit program
ATS635LSE and ats636lse programmable true po wer - on hall - effect g ear - tooth switche s 115 northeast cutoff, box 15036 worcester, massachusetts 01615 - 0036 (508) 853 - 5000 copyright ? 2005 allegro microsystems, inc. functional description (cont.): typical application circuit applications. i t is strongly recommended that an external ceramic bypass capacitor in the range of 0.01 f to 0.1 f be connected between the supply and ground of the device to reduce both external noise and noise generated by the chopper - stabilization technique. (the diagram below shows a 0.1 f bypass capacitor . ) the series resistor r s in combination with the bypass capacitor creates a filter for emc pulses. the series resistor will have a drop of approximately 800 mv, this must be considered for the minimum v cc requirement of the ATS635LSE / ats636lse. the small capacitor on the output of the device improves the emc performance of the device. the pull - up resistor should be chosen to limit the current through the output transistor; do not exceed the maximum continuous output current of the device. note: this circuit cannot be used to program the device, as the series resistance is too large, and a minimum capacitance of 0.1 f must be connected from v cc to gnd of the sip to provide the current necessary to blow the fuse. typical application: 1.2k ohm v supply vcc 1 r l 100 ohm 2 4 gnd r s 0.1 f 5v vout ats635/636 120 pf extensive applications information on magnets and hall - effect sensors including chopper - stabilization is available in the allegro electronic data book cd, or at the website: http://www.allegromicro.com .
ATS635LSE and ats636lse programmable true po wer - on hall - effect g ear - tooth switche s page 11 of 15 115 northeast cutoff, box 15036 worcester, massachusetts 01615 - 0036 (508) 853 - 5000 copyright ? 2005 allegro microsystems, inc. characteristic data data taken from 3 lots, 30 pieces/lot reference target 8x i cc on 0 1 2 3 4 5 6 -50 -25 0 25 50 75 100 125 150 175 temperature (c) i cc (ma) 4v 15v 24v i cc off 0 1 2 3 4 5 6 -50 -25 0 25 50 75 100 125 150 175 temperature (c) i cc (ma) 4v 15v 24v v sat 0 100 200 300 400 500 -50 -25 0 25 50 75 100 125 150 175 temperature (c) v sat (mv) 20ma
ATS635LSE and ats636lse programmable true po wer - on hall - effect g ear - tooth switche s page 12 of 15 115 northeast cutoff, box 15036 worcester, massachusetts 01615 - 0036 (508) 853 - 5000 copyright ? 2005 allegro microsystems, inc. characteristic data (continued) data taken from 3 lots, 30 pieces/lot reference target 8x notes: s air gaps for code 127 @ 150c are interpolated due to test limitations at minimum air gap. s these graphs are intended to provide an understanding of how the program codes affect the switch points. in a production environment, individual devices would be programmed to individual codes to ensure all devices switch at the same air gap. b op /b rp vs. program code 0 1 2 3 4 5 6 7 -50 0 50 100 150 200 temperature (c) air gap (mm) code -8 bop code -8 brp code 0 bop code 0 brp code +32 bop code +32 brp code +127 bop code +127 brp
ATS635LSE and ats636lse programmable true po wer - on hall - effect g ear - tooth switche s page 13 of 15 115 northeast cutoff, box 15036 worcester, massachusetts 01615 - 0036 (508) 853 - 5000 copyright ? 2005 allegro microsystems, inc. power de - rating ? se package power de - rating due to internal power consumption, the temperature of the ic (jun ction temperature, t j ) is higher than the ambient environment temperature, t a . to ensure that the device does not operate above the maximum rated junction temperature use the following calculations: d t=p d r q ja where p d = v cc i cc \ d t = v cc i cc r q ja where d t denotes the temperature rise resulting from the ic?s power dissipation: t j = t a + d t r q ja = 77 c/w t j(max) = 1 65 c typical t j calculation: t a = 25c, v cc = 5 v, i cc(on) = 5 .5 ma p d = v cc i cc p d = 5 v 5 .5 ma = 27 .5 mw d t = p d r q ja = 2 7 .5 mw 77 c/w = 2. 0 t j = t a + d t = 25c + 2. 0 c = 27. 0 c maximum allowable power dissipation calculation t j = t a + d t t j(max) = 1 65 c, if t a = 150c then: 1 65 = 150 + d t d t = 15 c d t = p d r q ja (r q ja = 77 c/w) \ p d(max) = 1 5 c / 77 c/w = 1 95 mw @ t a = 150c maximum v cc for p d(max) = 111 mw at t a =150c p d = v cc i cc i cc = 10ma (max) at 150c v cc = p d / i cc = 1 95 mw / 5.5 ma = 35 . 4 v 0 50 0 100 0 150 0 200 0 25 0 0 300 0 350 0 400 0 450 0 2 0 4 0 6 0 8 0 1 0 0 1 2 0 1 4 0 1 6 0 1 8 0 temperature ( c) power d i s s i p a t i o n, p d (m w) power dissipation versus ambient temperature (r qja = 7 7 oc/w) 2-layer pcb
ATS635LSE and ats636lse programmable true po wer - on hall - effect g ear - tooth switche s page 14 of 15 115 northeast cutoff, box 15036 worcester, massachusetts 01615 - 0036 (508) 853 - 5000 copyright ? 2005 allegro microsystems, inc. se package dimension s reference dimensions only 1.27 .050 1.08 .043 10 .394 7 .276 0.38 .015 6.2 .244 20.95 .825 11 .6 .457 4.9 .193 3.3 .130 1.3 .051 2 .079 0.6 .240 24 3 1 a a a b c c d d b dambar removal protrusion (16x) metallic protrusion, electrically connected to pin 4 and substrate (both sides) active area depth, 0.43 mm [.017] thermoplastic molded lead bar for alignment during shipment e hall element (not to scale) preliminary dimensions, for reference onl y untoleranced dimensions are nominal . dimensions in millimeters u.s. customary dimensions (in.) in brackets, for reference onl y dimensions exclusive of mold flash, burrs, and dambar protrusions exact case and lead configuration at supplier discretion within limits shown e
ATS635LSE and ats636lse programmable true po wer - on hall - effect g ear - tooth switche s page 15 of 15 115 northeast cutoff, box 15036 worcester, massachusetts 01615 - 0036 (508) 853 - 5000 copyright ? 2005 allegro microsystems, inc. the products described herein are ma nufactured under one or more of the following u.s. patents: 5,045,920; 5,264,783; 5,442,283; 5,389,889; 5,581,179; 5,517,112; 5,619,137; 5,621,319; 5,650,719; 5,686,894; 5,694,038; 5,719,130; 5,917,320; and other patents pending. allegro microsystems, in c. reserves the right to make, from time to time, such departures from the detail specifications as may be required to permit improvements in the design of its products. before placing an order, the user is cautioned to verify that the information being r elied upon is current. allegro products are not authorized for use as critical components in life - support applications, devices, or systems without express written approval. the information included herein is believed to be accurate and reliable. howeve r, allegro microsystems, inc. assumes no responsibility for its use; nor for any infringements of patents or other rights of third parties which may result from its use.


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